Job description:

1. Responsible for the analog layout design and verification of the chip, optimize the circuit performance, complete the layout design of the circuit module and the whole chip;

2. Familiar with mixed signal layout design, able to fully communicate with circuit design engineers, fully understand the layout requirements of the design, and ensure circuit performance optimization;

3. Responsible for the preparation of relevant delivery documents, including but not limited to the maintenance of layout verification and acceptance standards and CHECKLIST, Tapeout documents, etc.

4. Independently completed DRC and LVS of layout, maintained PDK and necessary optimization and modification.

Job qualifications:

1. College degree or above in electronics, instrument, computer, communication, physics, mathematics or related field;

2. At least 2 years experience in full custom layout, experience in tapeout is preferred;

3.  

   High speed broadband circuit layout experience is preferred;

4.  

   Familiar with CMOS process, have solid semiconductor theory knowledge and can understand the common circuit structure;

5.  

   Familiar with Linux system and Virtuoso, Calibre and other layout design and verification tools;

6.  

   Master the matching rules of simulation layout, noise shielding, etc. Deep understanding of ESD, latch-up design rules;

7.  

   Proactive and responsible, with good team spirit and communication skills.